Energy-Efficient Computing: from Devices to Architectures | 17 531

Opportunity Information: Apply for 17 531

The Energy-Efficient Computing: from Devices to Architectures opportunity (NSF Funding Opportunity No. 17-531) is a discretionary research grant program aimed at confronting what the solicitation frames as a broad, industry-wide performance-and-energy wall in modern computing. The core idea is that across many computing domains, further performance gains are increasingly constrained by the energy required not only to compute, but also to store and, especially, to move data. The program argues that incremental, evolutionary improvements are no longer enough, because energy costs and data movement overheads now dominate many system designs. As a result, the opportunity is positioned around the need for disruptive, step-change advances that can unlock sustainable improvements in computational performance under tight energy limits.

A central theme is end-to-end, cross-layer innovation rather than isolated progress in a single component. The solicitation emphasizes that breakthroughs must occur at multiple levels of the computing stack, spanning devices and materials, circuits, architectures, systems, and programming models. Just as importantly, it calls for simultaneous co-optimization across these layers, meaning proposals should not treat each layer independently, but instead show how choices in one layer (for example, devices or interconnect) shape and enable improvements in others (such as architecture, memory hierarchy, and software). The objective is to support research that reduces the energy impact of processing, storing, and moving data within future computing systems, recognizing that data transport and memory access frequently consume a significant share of system energy.

The opportunity also highlights an organizational challenge: the technical problems are described as so multidisciplinary that they demand new ways of collaborating. It explicitly encourages research efforts that bring together communities that do not always work in the same projects, such as programmers, system architects, circuit designers, chip fabrication and processing experts, materials scientists, and computational chemists. The intent is to promote co-design approaches where these groups jointly explore and define an “optimal solution path,” rather than handing off requirements sequentially from one specialty to another. In practice, that framing signals an interest in integrated project teams and research plans that connect fundamental advances (like new materials, devices, or fabrication approaches) to system-level impact (like reduced energy per operation, reduced energy per bit moved, or improved performance per watt).

This program is a partnership between the National Science Foundation (NSF) and the Semiconductor Research Corporation (SRC), reflecting both public and industry interest in addressing energy-constrained computing limits. The solicitation portrays the supported research as strategically important to academia, industry, and society, and notes that the effort is intended to be synergistic with other work tackling the broader challenge of energy-limited computing performance. It is also aligned with major national priorities and initiatives mentioned in the notice, including the National Strategic Computing Initiative and a nanotechnology-inspired Grand Challenge for Future Computing, suggesting the program sits within a larger federal push toward next-generation computing technologies.

From an administrative standpoint, the funding instrument is a grant under the Science and Technology and other Research and Development activity category, with CFDA numbers 47.041 and 47.070. The expected scale of the competition, as listed, includes about 8 expected awards, with an award ceiling of $1,600,000 per award. The opportunity was created on December 8, 2016, and the original closing date was March 7, 2017. Eligibility is listed as “Others,” with additional eligibility details referenced as being provided in the full announcement text.

• The National Science Foundation in the science and technology and other research and development sector is offering a public funding opportunity titled "Energy-Efficient Computing: from Devices to Architectures" and is now available to receive applicants.
• Interested and eligible applicants and submit their applications by referencing the CFDA number(s): 47.041, 47.070.
• This funding opportunity was created on Dec 08, 2016.
• Applicants must submit their applications by Mar 07, 2017. (Agency may still review applications by suitable applicants for the remaining/unused allocated funding in 2026.)
• Each selected applicant is eligible to receive up to $1,600,000.00 in funding.
• The number of recipients for this funding is limited to 8 candidate(s).
• Eligible applicants include: Others (see text field entitled Additional Information on Eligibility for clarification).

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